A sound chip

The last page ended with the CPU making sound by itself, sample by sample, and running out of time at two notes. A sound chip takes that job: the CPU says which notes, how loud and in what tone, and the chip makes the samples. The most famous is the SID, the Commodore 64’s, and the DSP site has a page about it, with its sound. This page builds one in gateware, sound.v, with the SID’s registers at $8400, so it plays the same way.

It’s also where the trade on Making it faster comes home: three voices, but only one voice’s worth of logic, taking turns.

1 · Three voices

Each of the three voices is the same:

an oscillator, which sets the pitch;
a waveform made from it: triangle, sawtooth, pulse or noise;
an envelope, which makes the note swell and fade: attack, decay, sustain, release.

The three voices are mixed, some of them (as the program chooses) through a filter first, and the volume set. Its registers, from $8400, are the SID’s:

Offset	Register
$00–$01, $07–$08, $0E–$0F	FREQ	each voice’s frequency, 16 bits: f × 2²⁴ / 1 MHz
$02–$03, …	PW	the pulse’s width, 12 bits
$04, $0B, $12	CONTROL	bit 0 gate (note on), 1 sync, 2 ring, 3 test; bits 4–7 triangle, sawtooth, pulse, noise
$05–$06, …	AD, SR	attack and decay, sustain and release: 4 bits each
$15–$16	FC	the filter’s cutoff, 11 bits
$17	RES/FILT	resonance, 4 bits; which voices go through the filter
$18	MODE/VOL	low-, band-, high-pass; voice 3 off; the volume, 4 bits
$1B, $1C	OSC3, ENV3	read: voice 3’s waveform and envelope (with noise, a random number)

2 · The oscillator and its waveforms

The oscillator is a phase accumulator: a 24-bit register that has FREQ added to it every microsecond, and wraps round. It goes round once every 2²⁴ / FREQ microseconds, so its pitch is FREQ × 1,000,000 / 2²⁴ Hz, about 0.06 Hz per step: middle C (261.6 Hz) is FREQ = 4,389. (The C64’s SID ran at its 985 kHz clock, so the same numbers give notes about 1.5% lower there.) The DSP site’s page on the phase accumulator goes into how this kind of oscillator works, and what its bits buy.

The waveforms are made from the accumulator’s top 12 bits, with almost no logic at all:

The four waveforms, two cycles of each, as sound.v makes them: the sawtooth is the top 12 bits as they are; the triangle is them folded at the top bit (turned over when it’s set); the pulse is high while the top 12 bits are at or above the pulse width; noise is 8 bits of a 23-bit shift register that steps along with the oscillator. Choose more than one and they’re ANDed together, as on the real chip (whose combined waveforms are a little different: its transistors fight rather than AND).

The pulse width makes the pulse thinner or fatter, and changing it slowly (from the program, 50 times a second) gives the SID’s famous swirling sound. Ring modulation swaps the triangle’s fold for the top bit of the voice before; hard sync restarts a voice’s accumulator each time the one before goes round. Both make voices interact, and both need the voice before’s state, which matters below.

3 · The envelope

Each voice’s envelope is an 8-bit level, 0 to 255, that the waveform is multiplied by. Setting the gate bit starts the attack, up to 255; then the decay, down to the sustain level, held while the gate stays set; clearing the gate starts the release, down to 0.

An envelope, from the SID model’s own logic (which sound.v matches). Each setting, 0 to 15, picks a time from the SID’s table: the attack’s time to the top, or the decay’s and release’s to go all the way down. The decay and release fall faster at first and slower later: the chip slows its steps as the level falls, at a few levels, a rough exponential in straight pieces. The dashed line is where the gate is cleared.

The rates are counted by a 15-bit counter, which steps the envelope when it matches the rate’s period. That gives the SID a quirk, kept here on purpose: if the period changes to one the counter has already passed, it has to count all the way round to 32,768 first, and the note starts up to 33 ms late. Players on the C64 learned to work round it with a “hard restart”, setting things up a couple of frames before each note.

4 · The filter

The filter is a state-variable filter: three running values, low-pass, band-pass and high-pass, each worked out from the others every microsecond with two multiplications by the cutoff and one by the resonance. The program chooses which voices go through it, which of its three outputs to hear, and its cutoff (11 bits, a straight line here from 30 Hz to 12 kHz, like the later SID, the 8580) and resonance. A synthesiser’s sound is mostly in its filter, and the synthesis pages on the DSP site go through what it does.

5 · One voice’s logic, used in turn

Three voices could be three copies of the logic: three 24-bit adders for the oscillators, three envelopes, three multipliers. But the chip only needs a new sample once a microsecond, and the FPGA’s clock gives twelve clocks in each. So sound.v has one copy of everything, and the twelve clocks are slots: in each, the one copy does one job for one voice.

The twelve slots of one microsecond in sound.v. In slots 0–8 the voice logic works on whichever voice is in the ring’s first place, r0, and then the ring turns, bringing the next one round. Each of the seven products (three envelopes, three for the filter, the volume) goes through one multiplier, a DSP block; every sum of the filter and the mix through one adder. The filter’s sums for one microsecond finish in the first slots of the next, so the sound comes out a microsecond later than three copies would make it.

The voices’ registers and state are 136 bits each, kept in a ring of three. The voice being worked on is always in the same place, so the logic never has to choose between three: choosing would take a three-way multiplexer on every one of those bits. After each of slots 0–8 the ring turns one place. Nine turns is three times round, so by the time the CPU writes (between microseconds), voice n is back in place n. And the voice before the one being worked on, which sync and ring modulation need, is always in the last place.

The next page, One voice’s logic, in turn, shows how it’s written, with a small engine done three ways and measured, and the whole of sound.v. This is the trade from Making it faster: more time for less logic. The chip takes 1,516 logic cells and 2 of the UP5K’s 8 DSP blocks (the second works out the filter’s cutoff from its register), with the computer and every other peripheral alongside.

6 · Checking it

A sound chip is easy to get subtly wrong and hard to check by ear. So sound.v was checked against the site’s own SID model (the one the DSP site plays, and the one this page’s figures use): the same 38 register writes to both, over 120,000 microseconds, through every waveform, sync, ring modulation, the test bit, every filter mode, and an envelope change mid-decay that makes the counter go round. Every voice’s oscillator, noise register and envelope came out identical, every microsecond. The output, where the chip works in whole numbers and the model in floating point, was within 0.2% of the loudest.

The computer with the sound chip at $8400 (tick sound). Play it from the buttons: buttons 1–3 play C, E and G, each on its own voice, with a quick attack and a slow release; button 4 changes the waveform; the knob moves the filter’s cutoff. (A note may start up to 33 ms late: the envelope’s quirk.) A tune in three voices: a player run by a timer interrupt 50 times a second, as music on home computers was, each voice reading notes from its own track.

Summary

A sound chip makes the samples itself: the CPU only sets notes, waveforms, envelopes and the filter.
Each voice is a phase accumulator, a waveform made from its top bits, and an envelope.
sound.v has one voice’s logic, one multiplier and one adder, taking turns in twelve slots a microsecond; the voices’ state turns round in a ring.
It matches the site’s SID model cycle for cycle.